In going from double precision to quad (or higher) precision,

• roughly how much of a performance hit is taken on various architectures and frameworks. Do floating point operations take twice as much time? Ten times as much time? One hundred times as much time?
• What frameworks are currently available that support quad precision for large-scale computation?

I'm interested in answers both about software simulation of quad precision with doubles, as well as quad precision that is done natively in hardware.

Disclaimer: Obviously given a problem requiring quad precision, the first step is to try to reformulate or restructure it so that it doesn't need quad precision anymore. Suppose for the sake of answering this question that such a reformulation of the problem is not possible and quad precision is truly needed.

• There does not appear to be any currently available hardware which natively supports IEEE quad-precision floating point, at least according to wikipedia. That means it must be implemented as a library, which probably means more than twice as much time as a double-precision computation. Exactly how much more would be a matter of experiment that I haven't tried. – Daniel Shapero Nov 17 '14 at 6:42

On the other hand, some ABIs implement quad precision by representing quad precision numbers $x$ as $x=a+\varepsilon b$ where $\epsilon$ is roughly equal to machine precision for double precision. In that case, additions and multiplications for quad precision can be implemented with a cost of 2-4 that of double precision because adding or multiplying two such numbers $x,y$ only involves adding or multiplying their respective components.