The most common case is that you cannot allocate a memory block larger than what is physically available for your GPU card. However, depending on your hardware and driver, the maximum allocatable size might be a fraction of the total physically installed memory (e.g. old AMD opencl drivers only allowed a maximum of 500 MB), so it is better if you read into the specs of the vendor (NVIDIA, AMD, or Intel).
In the case that a GPU kernel of your implementation needs to access more of the global, or local / shared memory than what one can allocate at once, then you have to manually manage the memory by allocating and freeing memory segments (smaller than maximum memory) and transfer them between host and GPU as needed.
As far as my experience goes, memory management is crucial for achieving high performance for GPU applications. The reason for this is that for most applications, transferring data through the PCIe between host and GPU can become a big bottleneck. To illustrate the PCIe problem, consider that the maximum bandwidth of PCIe 2.0 (x16 lanes) is 8 GB/s bidirectional, whereas the bandwidth from on board GPU memory to GPU chip is +140 GB/s. Moreover, all the tiny cores of a GPU can collectively process several terabytes of data per second, thus most high performance GPU kernels also need to make efficient use of shared / local and register memory (which is orders of magnitude faster than accessing global memory).
An alternative to explicit memory management, is to use extensions to opencl where a GPU kernel can directly access, from the discrete GPU chip, memory segments that reside on host (as fas as I know, AMD allows this). In such a case, the GPU would halt execution until data is received from host, these can be a very long time from the perspective of the GPU thread.
A more interesting scenario happens when the CPU and GPU are integrated in the same chip. In such a case, CPU and GPU share the host memory (consider the fusion architecture of AMD) so there should not be necessary to copy data between host and device.